A clock has a 1ns clock period with rise and fall time as 0.05ns. The clock signal stays at exact Boolean state 1 for 0.35ns and at state 0 for 0.55ns. The memory used in the design takes 2 clock cycle time to compute a write and 1 clock cycle to compute a read operation.
What is the frequency of this clock? My attempt: $T = 1/f \Rightarrow f = 1/T = 1/1ns = 1/10^{-9}s = 10^9s = 10^{15}μs$
What is the duty cycle of this clock? My attempt: $D = t_hh/T * 100 = (0.35ns/10^{-15}μs) * 100 = 0.00035μs/10^{-15}μs = 3.5^{13}μs$
Could someone please kindly confirm whether I did this correctly or not?