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Design and implement a digital circuit which will detect a 4 bit number which is less than 3 or greater than 12 or divisible by 3 (if conditions are met, the output is 1, 0 otherwise). Implement the circuit with NAND only logic gate.

I've derived a truth table to it which looks like this: enter image description here

But in the example that my professor showed in class, he was able to have outputs such as W,X,Y,Z. From there he derived the circuit with the output. I seem to be stuck on the very first step because I am not sure how to translate this truth table to have results in the form of WXYZ. It seems like I only have one end result.

user215717
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  • They are just symbols, they might mean whatever your professor wanted them to mean. I suspect X,Y,Z would be "input<3", "input>12" and "divisible by 3" in your truth table. Then W would be the result, which is equal to $X\lor Y\lor Z$.

    Also, if you want to simplify things a bit, notice that the table is symmetric.

     – sbares Feb 18 '15 at 07:34
  • I just realized the fact that the circuit could only have one output. Which I think is the case here. And wow, I did not notice the symmetry. That's really interesting! Thank you! – user215717 Feb 18 '15 at 08:02

1 Answers1

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http://en.wikipedia.org/wiki/NAND_logic

Use this for constructing any gate - AND/OR/EXOR etc. As far as your equation goes, it simplifies to A.B + A'B' + A'.B.C.D' + A.B'.C'.D where . refers to AND gate, + refers to OR gate and ' refers to NOT.

Raghuraman R
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