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Circuit Diagram

Currently having trouble understanding how to write out the boolean expression up to the exclusive or gate. Up to the third NAND gate I solved it to be AB+CD. But I get stumped on how to write out the fourth gate. Would it be 0 (+) AB+CD then? If so how would I expand this expression further?

bevi
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  • Do you have to rearrange the expression further? Is there a particular normal form you're supposed to put it in? – David K Feb 28 '15 at 22:37
  • Is that other input a variable $O$ (which could be zero or one) or is it a constant $0$ (zero)? – David K Feb 28 '15 at 22:38
  • @DavidK I am certain it is a constant. And I am pretty sure it needs to be simplified unless the expression is at its simplest form already. – bevi Feb 28 '15 at 22:46
  • @bevi: What is that arc in front of the OR gate? Or does the arc belong to the symbol of the OR gate? – zoli Feb 28 '15 at 22:53
  • @zoli the arc is part of the OR gate. An arc with an OR gate is called an Exclusive OR gate. The expression for that gate is F = XY' + X'Y which is simplified to the expression X ⊕ Y – bevi Feb 28 '15 at 22:59
  • For an exclusive-or gate, just think about putting an arbitrary signal $X$ into one input while the other input receives $0$, and see what comes out. You only have to look at two cases: $X=0$, and $X=1$. – David K Feb 28 '15 at 23:00
  • @DavidK Then the expression would be X0 + X'0? Sorry I'm just getting confused by the 0 in the expression and not being able to invert it for this exclusive or gate. – bevi Feb 28 '15 at 23:13
  • If $Y=0$ then $Y'=1$, not $0$. So you get $X0 + X'1$. – David K Feb 28 '15 at 23:18
  • @DavidK ah ok I see. So then for my problem it would be F=(AB+CD)0 + (A'B'+C'D')1 – bevi Feb 28 '15 at 23:25
  • Except I think we've both got the XOR formula a bit mixed up (or maybe it was just me), because two zero inputs should produce a zero output. (If it were an XNOR then the output would be $1$, but I don't see a bubble on that gate.) – David K Feb 28 '15 at 23:40

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The lesson here, I think, is how you deal with a logic gate when one or more inputs of the gate have been wired to a constant $0$ or $1$. This may seem like a silly thing to do, but it has at least two very practical applications I can think of:

  1. When you have to use an off-the-shelf part rather than being able to specify a circuit with exactly the gates you want and no others, you may end up with some superfluous gates (or superfluous inputs to some gates) and you have to "tie off" the extra inputs to something that will allow the circuit to function the way you want despite the unwanted logic.

  2. When there is a manufacturing defect in a digital logic circuit, it often manifests as if one of the outputs of a gate is shorted either to the "$0$" voltage source (e.g., ground) or shorted to the "$1$" voltage source. If you want to devise tests to detect whether such a defect has happened, you have to figure out how the device will behave differently with this constant $0$ or $1$ input to some of its gates instead of the usual logic inputs. Whole textbooks have been written on this problem.

The basic rules are actually quite simple. For example, here's the logic table for a two-input NAND gate with inputs $X$ and $Y$:

$$\begin{array}{ccc} X & Y & \mbox{output} \\ \hline 0 & 0 & 1 \\ 1 & 0 & 1 \\ 0 & 1 & 1 \\ 1 & 1 & 0 \end{array}$$

Now what happens if we short $Y$ to the $1$ voltage source is that $Y$ is never $0$, so the first two lines of the table above become irrelevant. We're left with

$$\begin{array}{ccc} X & Y & \mbox{output} \\ \hline 0 & 1 & 1 \\ 1 & 1 & 0 \end{array}$$

So $X\ \mathrm{NAND}\ 1 = X'$, that is, the NAND gate becomes a simple inverter for the remaining non-shorted input.

To see the implications for an XOR gate (or any other logic element), you can write out a similar logic table. In this case one of the inputs is shorted to $0$, so you can scratch out the lines where that input is $1$ and see what's left.

David K
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  • Ah ok, this makes a little more sense to me now. So simplifying O ⊕ AB+CD would = 0. Since 0 remains a constant in the expression? – bevi Mar 01 '15 at 00:15
  • It's better to write $0 \oplus (AB+CD)$ to make clear which "or" gets done first, and remember that although a single constant $0$ input forces the output of either an AND or NAND gate to a constant, it doesn't completely control the output of an OR, NOR, or XOR gate. – David K Mar 01 '15 at 00:36
  • oh wow I feel dumb. I get it now. Thank you so much for the help I think I was able to solve the problem. – bevi Mar 01 '15 at 01:04